PCI assemblies may include a host controller coupled to a PCI bus, and one or more master devices and one or more target devices. The master and target devices may also be coupled to the PCI bus. One type of PCI assembly is a stackable form-factor assembly. A representative stackable form-factor PCI assembly 100 in conformance with a PC/104 or PC/104-Plus specification is illustrated in FIG. 1. Briefly, clock signals 103 from a host controller 102 are length-matched to compensate for the distance from host controller 102 to each master/target: card 104 coupled to a PCI bus 106. That is, host controller 102 adjusts or skews timing of the clock signals 103 depending on how far the clock signal 103 must travel to a particular master/target card 104.
For a PC/104-Plus assembly, each master/target card 104 utilizes 4:1 multiplexor 104A to manage clock signal selection from PCI bus 106. In terms of providing a device clock signal for the particular master/target device 104B, multiplexor 104A selects the appropriate time-skewed clock signal from PCI bus 106 for the device clock 108. Since clock signal adjustments or skewing is unique to host controller 102, the PCI assembly requires a design for a host controller 102 and a different design for a master/target card 104.
In addition, stackable form-factor PCI devices/assemblies may be constructed using SRAM-based Field Programmable Gate Arrays (FPGAs). However, these types of devices require device configuration after power up and before use thereof. This time delay (on the order of several hundred milliseconds) delays the PCI assembly's operational functions.